TITLE: Thin film detector and method of manufacture United States Patent 5300807 ABSTRACT: The invention is related to electronic and more specifically to photo-electronic devices manufactured by means of thin film layering techniques. The invention proposes the use of polymer, copolymer, polyamide and similar organic casting materials, in layers 500 to 10,000 angstroms thick, as protective barriers between layers where the processing of one layer would be adversely affected by or would damage an adjacent previously formed layer. INVENTORS: Nelson, Elizabeth H. (Springfield, VA) APPLICATION NUMBER: 07/823749 PUBLICATION DATE: 04/05/1994 FILING DATE: 01/22/1992 ASSIGNEE: The United States of America as represented by the Secretary of the Army (Washington, DC) PRIMARY CLASS: 257/632 OTHER CLASSES: 257/642, 257/702, 257/E23.007, 257/E23.077 INTERNATIONAL CLASSES: H01L23/14; H01L23/498; (IPC1-7): H01L23/02; H01L23/12 FIELD OF SEARCH: 257/792, 257/632, 257/642, 257/643, 257/702, 257/738 US PATENT REFERENCES: 5151769 Optically patterned RF shield for an integrated circuit chip for analog and/or digital operation at microwave frequencies September, 1992 Immorlica, Jr. et al. 257/659 5049978 Conductively enclosed hybrid integrated circuit assembly using a silicon substrate September, 1991 Bates et al. 257/686 4989068 Semiconductor device and method of manufacturing the same January, 1991 Yasuhara et al. 257/792 OTHER REFERENCES: Mukai, K., et al. "Planar Multilevel Interconnection Technology . . . " I J. of Solid State Circuits, Aug. 1978, pp. 462-467. PRIMARY EXAMINER: Crane, Sara W. Attorney, Agent or Firm: Lee, Milton W. Holford, John E. Lane, Anthony T. CLAIMS: I claim: 1. A solid state layered electronic device having a thin layer of electronic material deposited over and supported by a substrate of aerogel material with an upper surface too weak and porous to withstand the deposition of said layer; including: a thin precast layer of organic material attached to said upper surface said electronic material being deposited on said precast layer. 2. A device according to claim 1, wherein; said electronic material is a thin layer of metal. 3. A device according to claim 1, wherein: said electronic material is a thin layer of insulator. 4. A device according to claim 1, wherein: said electronic material is a thin layer of semiconductor. 5. A device according to claim 2, wherein: a thin layer of pyroelectric material is bonded over said electronic material. 6. A device according to claim 3, wherein: a thin layer of pyroelectric material is bonded over said electronic material. 7. A device according to claim 4, wherein: a thin layer of pyroelectric material is bonded over said electronic material. 8. A device according to claim 1, wherein said electronic material includes: at least two sequential thin layers of material chosen from a group consisting of electrical conductors, insulators, semiconductors, and pyroelectrics. DESCRIPTION: BACKGROUND OF THE INVENTION 1. FIELD The invention is related to electronic and photoelectronic devices manufactured by means of thin film and monolithic layering techniques. 2. PRIOR ART Most electronic devices are now made using thin layers of material on a supporting substrate. This has led to the evolution of monolithic semiconductor devices wherein the active portions of a device reside in a single crystal of silicon, germanium, gallium arsenide, mercury cadmium telluride, and various other similar types of materials. These monolithic devices are now being combined with one another and other thin film structures to form more exotic devices. For example, an array of gallium arsenide photo-detectors which operate in the far-infrared have been combined with a silicon charged-coupled-device originally designed for use with visible light detectors made of silicon. Such detectors may be photovoltaic devices, photoconductors or pyroelectric devices. To interface these devices; with each other, a support structure and an optical input element; involves further layering techniques. Some of the layering techniques involve electrical isolation or conduction, thermal isolation, differential thermal expansion, and surface architecture such as crystal lattices and larger irregularities. An object of this invention is to provide a specially prepared thin, flat mechanically stable and/or chemically resistant organic layer, to interface otherwise incompatible surface layers of microelectronic devices, and the method of making and using this layer. SUMMARY OF THE INVENTION The invention provides a structure and method wherein a barrier layer is formed between two sequential layers of an electronic device which are incompatible. For example, in a thermal or far-infrared photo sensor array, it would be desirable to deposit a silicon dioxide layer and/or a common electrode on an aerogel substrate. The latter is an excellent light weight thermal insulator with good dimensional stability but its surface is too delicate and porous for electroplating, thermal evaporation, sputtering or wet chemical processing. Due to the nature of aerogel materials, a dry process must be used to join the barrier layer to the aerogel substrate. The barrier layer is formed separately from the substrate and the other layers to achieve a flat structure of uniform thickness and to avoid chemical and physical damage to the substrate or layers. When the completed barrier layer o contacts the substrate, it bonds thereto and can be coated by vacuum sputtering or the other methods mentioned above. BRIEF DESCRIPTION OF THE DRAWINGS The invention is best understood with reference to the drawings wherein: FIG. 1 shows a mechanical manipulator for the support rings on which the above mentioned barrier layer may be lifted; FIG. 2 shows a temperature controlled tray in which the barrier layer is first formed; FIG. 3 shows a ring structure which presents a large contact area to the barrier layer; FIG. 4 shows a ring with significantly less contact area than the ring in FIG. 3. FIG. 5 shows the structure of an electrical device made according to the present invention. DESCRIPTION OF THE PREFERRED EMBODIMENT Electronic devices, and particularly microelectronic devices, are usually formed in-situ on some form of substrate. Often the substrate is chosen to facilitate formation of the device, as when the crystalline structure of the substrate is chosen to match the crystalline structure of a semiconductor used in the active layers of a device. At other times, a substrate may be part of another existing structure and may require properties such that direct formation of a device thereon is impractical. One example is a unique substrate material known as an aerogel. This material was introduced in the early 1930's and usually consists of silica, alumina, zinconia, stannic oxide, tungsten oxide or mixtures thereof. Aerogels are sol-gel derived supercritically dried materials with porosities up to 98%. A description of this material and its fabrication is found in the article "AEROGELS--HIGHLY TENUOUS SOLIDS WITH FASCINATING PROPERTIES", by J. Frick, Journal of Noncrystalline Solids, North Holland, Amsterdam), Vol. 100, No. 1-3, pp 169-173. This material has many interesting qualities as a substrate. It is rigid, but extremely lightweight. It is an excellent thermal insulator and sound insulator. It is also transparent or translucent to visible light and a good absorber of infrared light. It has been suggested as a substrate for arrays of thermal infrared or pyroelectric detectors to prevent thermal interaction between detectors. These detectors; examples of which appear in applicant's copending application entitled "Ion Beam Etching of Metal Oxide Ceramics", filed Apr. 30, 1991 and U.S. Pat. No. 4,927,771 for "Method of Thermal Isolation of Detector Elements in an Uncooled Staring Focal Plane Array" by Donald A. Ferrett, issued May 22, 1990; require a uniformly thin common electrode formed by ion-beam sputtering, RF sputtering, magnetron sputtering, etc. These processes would damage the delicate surface of the aerogel and deposit material into its pores producing an electrode with a very non-uniform thickness. To prevent this, the present invention proposes the use of a barrier layer between the substrate and the electrode, which must be applied using a dry process. Many electronic devices involve this type of boundary, i.e. a boundary between a nonconducting substrate and a conducting or semiconducting layer. To form the barrier layer, it is preferred to use such materials as polymers, copolymers, and polyamides which can be formed into films between 500 to 10,000 angstroms thick. FIG. 1 shows a manipulator used to handle such a film in its formation. The manipulator is mounted on a post 10 with a rack 11 attached so that it can engage a pinion or worm gear (not shown) attached to a table, to raise or lower the beam support 12 which extends parallel to the table. An upper axle member 13 extends through the distal end of the beam from the post also parallel to the table. A support rod 14 extends vertically through a hole in the axle member and is locked in place by a set screw 15. The lower end of the rod terminates in a bearing block 16 which supports a lower axle member 17, again, parallel to the table. The lower axle member is fixed to a ring clamp 18 with a clamping screw 19. The ring clamp has a circular opening slightly larger in diameter than the support rings to be used, which are nominally 2.5 inches; although this is not critical. A friction lever 20 pivoted on the beam presses against the vertical rod to level the ring clamp with the table top. A lower tilting lever 21 attached to the ring clamp permits leveling normal to that of the friction lever. FIG. 2 shows a thermally controlled tray 22 in which the barrier layers may be formed. The square tray contains a closed chamber 23 through which warm water is circulated to maintain the desired operating temperature. The tray also has a top pan 24 with a flat bottom having a width C of about 6 inches. The bottom slopes upward to a width B of about 12 inches, providing a maximum depth D of about 0.75 inches. The overall width A of the tray is about 14 inches and the overall depth E is about 3 inches. The tray has four equispaced adjustable height legs attached to its lower corners to level the tray with its contents. FIGS. 3 and 4 show typical ring configurations used in making different barrier layers. The ring of FIG. 3 has a maximum diameter F of 2.75 inches and minimum diameter of 2.25 inches, thus providing about 2 square inches of contact on its bottom surface. The ring of FIG. 4 with maximum and minimum diameters of 2.5 inches and 2.0 inches and has a minimum radial thickness of 0.15 inch. It presents only 0.57 square inches of contact on its lower surface. All of the above may be formed from stainless steel, aluminum, or plastic. Circular rings are the easiest to fabricate, but frames of any shape can obviously be used, as desired. The tray may be lined with Teflon for easy cleaning. FIG. 5 shows the structure of an electrical device made according to present invention. The device has a substrate 50 incompatible with vacuum deposition, e.g., an aerogel. On this was placed a precast barrier layer 51. The barrier layer is covered with a layer 52 of electronic material, e.g., a gold electrode. Additional layers can then be added in the usual manner to form a complete device. These layers can be deposited directly on layer 52 or a layer 53 of pyroelectric or similar material and can be plated with conductive electrodes 54 and 55, one of which is attached with solder 56 to layer 52. To form a barrier layer, the following steps are performed: A. Filling the tray with a liquid subphase with sufficient density and surface tension to float a mixture of chosen organic barrier materials and solvents; B. Circulating water under the tray at a fixed temperature a few degrees or more above room temperature to stabilize the rate of formation of the barrier layer; C. Depositing a mixture of barrier material and solvent from a pipette onto the surface of the liquid subphase; D. Viewing the spreading mixture to observe interference fringes of colors that appear at random over the entire surface of the mixture as it becomes a thin film, the film is relatively uniform in thickness and ready for lifting when the interference fringes fade away leaving a clear film; E. Leveling and lowering a support ring by its supporting structure until it lightly contacts the barrier layer; F. Lifting the barrier layer from the surface of the subphase by simultaneously lifting and tilting the support rings, e.g. a skilled person can perform Steps e. and f. by hand using only a ring; G. Sealing the ring and layer into a vacuum oven, baking the ring and layer to remove any remaining solvents, filling the oven with an inert gas atmosphere, this is best done in two cycles as indicated in Table II a short cycle in air and long cycle under vacuum; H. Removing the ring and barrier layer from the vacuum oven; I. Deriving the film thickness from the film's reflectivity at normal incidence and the film's index of refraction; J. Labeling and storing the ring and barrier layer in a dry box; K. Transferring the film, when needed, from the support ring to a solid substrate using a differential pressure such that contact with the substrate is made starting in the center of the substrate and moving out to the edges to expel any excess gases trapped between the two; K1. Step K may also be done entirely by hand at 1 atmosphere or under full vacuum using a commercially available vacuum manipulator; L. Sealing the substrate in a vacuum chamber equipped to coat substrates with one or more materials; M. Evacuating the chamber; N. Cooling the substrate and barrier layer to about 2° C.; and O. Forming at least one thin uniform layer over the exposed broad surface of the barrier layer. Table I lists a number of different barrier layer materials, solvents therefor, subphase liquids and subphase additives. This list is by no means exhaustive. Hundreds of similar materials will be evident to those skilled in the art. Applicant's barrier layers were originally prepared in a Formo Scientific Oven Model 3237, equipped with inert gas input and venting ports, however, to provide greater process control, Steps G through O may be performed continuous under vacuum in a multivestibule chamber. The barrier layer and the substrate would be placed in separate vestibules until the layer is dry and its vestibule evacuated, then both items would be located in to the same vestibule. Steps I and J, which are optional, would probably be omitted. The higher the melting point or sublimation temperature of the material in the barrier layer, the less likelihood they will be damaged when applying the first layer of the electronic device on it. The examples given have melting points of 1-3 hundred degrees C. These must be cooled during sputtering or the like, using water near 2° C. As better materials are found, this cooling will not be necessary. While the physical properties of the layers have been stressed, the chemical problems that arise between layers can be equally difficult. Some materials are poisoned by metal ions when adding electrodes. Some metal alloys contain mercury atoms which migrate easily into semiconductors. Some materials simply do not adhere to one another, but will adhere to a barrier material. Since most electrical devices generate heat, it will be beneficial in many cases to protect nearby elements by introducing an isolating aerogel layer as indicated above. TABLE I _______________________________________________________________________ ___ BARRIER LAYER FORMULATION EXAMPLES MATERIAL GM SOURCE SOLVENT ML CLASS _______________________________________________________________________ ___ Nitrocellulose 3.5 Generic Ethylacetate 12.5 Polymer Pentyl Acetate 12.5 Polyetherimide 1.0 Dupont 1,2,3 10.0 Polymer Trichloropropane L.R. 4330 264 GE 1,2,3 2.0 Co-Polymer Trichloropropane L.R. 3320 132 GE 1,2,3 2.0 Polymer Trichloropropane XU-218 400 CIBA 1,2,3 4.0 Polyimide Trichloropropane _______________________________________________________________________ ___ Subphase Deionized water with 0.8% 1Propanol 25° Subphase Surface Tension: 64.3 dyne/cm 18° C. TABLE II ______________________________________ BARRIER LAYER DRYING CYCLES TIME TEMP VACUUM CYCLE (Sec) °C. TORR BACKFILL ______________________________________ I 90 90-100 -- Air II 900 100-110 1.0 Nitrogen ______________________________________